Efficient Orthogonal Bicomplex Bilinear DSP Algorithm Design

نویسندگان
چکیده

برای دانلود باید عضویت طلایی داشته باشید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

An effective and efficient code generation algorithm for uniform loops on non-orthogonal DSP architecture

To meet ever-increasing demands for higher performance and lower power consumption, many high-end digital signal processors (DSPs) commonly employ non-orthogonal architecture. This architecture typically is characterized by irregular data paths, heterogeneous registers, and multiple memory banks. Moreover, sufficient compiler support is obviously important to harvest its benefits. However, usua...

متن کامل

An efficient algorithm of logarithmic transformation to Hirota bilinear form of KdV-type bilinear equation

In this paper, an efficient algorithm of logarithmic transformation to Hirota bilinear form of the KdV-type bilinear equation is established. In the algorithm, some properties of Hirota operator and logarithmic transformation are successfully applied, which helps to prove that the linear terms of the nonlinear partial differential equation play a crucial role in finding the Hirota bilinear form...

متن کامل

Efficient design of Certificateless Chameleon Signature from Bilinear Pairing

Certificateless public key cryptography (CL-PKC), does not require the use of the certificate to guarantee the authenticity of public keys. It does rely upon the use of a trusted third party (TTP), who is in possession of a master key. CL-PKC does not suffer from the key escrow property. Thus, CL-PKC can be seen as a model for the use in public key cryptography. In this paper, we proposed a new...

متن کامل

Design of Energy-Efficient High-Performance ASIP-DSP Platforms

In the last ten years, limited clock frequency scaling and increasing power density has shifted IC design focus towards parallelism, heterogeneity and energy efficiency. Improving energy efficiency is by no means simple and it calls for a reevaluation of old design choices in processor architecture, and perhaps more importantly, development of new programming methodologies that exploit the feat...

متن کامل

Design and Implementation of an Energy Efficient, Parallel, Asynchronous DSP

Energy efficient computing in a DSP has become an important research issue in order to have a longer battery operating time to support the modern portable devices. The energy efficient functional unit has been designed and implemented for an in-house asynchornous DSP named, Configurable Asynchronous DSP for Reduced Energy (CADRE). CADRE-successor (CADRE-s) has been implemented as a full custom ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

ژورنال

عنوان ژورنال: Electrical, Control and Communication Engineering

سال: 2020

ISSN: 2255-9159

DOI: 10.2478/ecce-2020-0005